update t440p script

coreboot-t440p/steps/attach_ch341a.sh

@@ -0,0 +1,37 @@
+#!/bin/sh
+# Step: Verify CH341A programmer connection
+
+step_attach_ch341a() {
+  section "Verify CH341A Programmer"
+
+  info "Make sure your CH341A programmer is:"
+  echo "  1. Connected to your computer via USB"
+  echo "  2. Set to 3.3V (NOT 5V!)"
+  echo "  3. Ribbon cable seated in the correct orientation"
+  echo ""
+  warn "Using 5V WILL damage your BIOS chip permanently!"
+
+  prompt_continue
+
+  info "Checking if flashrom detects the CH341A programmer..."
+  if run_cmd "flashrom --programmer ch341a_spi"; then
+    success "CH341A programmer detected!"
+    return 0
+  fi
+
+  error "CH341A programmer not detected."
+  echo ""
+  echo "  Troubleshooting:"
+  echo "    - Ensure the programmer is plugged in"
+  echo "    - Try a different USB port"
+  echo "    - Check the driver: lsusb | grep 1a86:5512"
+  echo "    - Make sure you have permissions (try with sudo)"
+  echo ""
+
+  if prompt_yes_no "Retry detection?"; then
+    step_attach_ch341a
+    return $?
+  fi
+
+  return 1
+}

coreboot-t440p/steps/backup_bios.sh

@@ -0,0 +1,48 @@
+#!/bin/sh
+# Step: Verify BIOS backup integrity
+
+step_backup_bios() {
+  section "Verify BIOS Backups"
+
+  cd "$WORK_DIR" || return 1
+
+  info "Verifying 4MB chip reads match..."
+  if diff 4mb_backup1.bin 4mb_backup2.bin >/dev/null 2>&1; then
+    success "4MB chip reads are identical."
+  else
+    error "4MB chip reads do NOT match!"
+    warn "The chip may not be reading reliably. Re-seat the programmer and try again."
+    return 1
+  fi
+
+  info "Verifying 8MB chip reads match..."
+  if diff 8mb_backup1.bin 8mb_backup2.bin >/dev/null 2>&1; then
+    success "8MB chip reads are identical."
+  else
+    error "8MB chip reads do NOT match!"
+    warn "The chip may not be reading reliably. Re-seat the programmer and try again."
+    return 1
+  fi
+
+  # Validate file sizes
+  _size_4mb=$(wc -c < 4mb_backup1.bin)
+  _size_8mb=$(wc -c < 8mb_backup1.bin)
+  info "4MB chip size: $_size_4mb bytes (expected $SIZE_4MB)"
+  info "8MB chip size: $_size_8mb bytes (expected $SIZE_8MB)"
+
+  if [ "$_size_4mb" -ne "$SIZE_4MB" ]; then
+    warn "4MB chip size mismatch. Expected $SIZE_4MB bytes, got $_size_4mb."
+    if ! prompt_yes_no "Continue anyway?"; then
+      return 1
+    fi
+  fi
+
+  if [ "$_size_8mb" -ne "$SIZE_8MB" ]; then
+    warn "8MB chip size mismatch. Expected $SIZE_8MB bytes, got $_size_8mb."
+    if ! prompt_yes_no "Continue anyway?"; then
+      return 1
+    fi
+  fi
+
+  success "All BIOS backups verified."
+}

coreboot-t440p/steps/build_bios.sh

@@ -0,0 +1,34 @@
+#!/bin/sh
+# Step: Build coreboot
+
+step_build_bios() {
+  section "Build Coreboot"
+
+  cd "$COREBOOT_DIR" || return 1
+
+  if [ ! -f ".config" ]; then
+    error "No .config found. Run the configure step first."
+    return 1
+  fi
+
+  _nproc=$(nproc 2>/dev/null || echo 1)
+
+  # Build the cross-compiler
+  info "Building cross-compiler toolchain (this will take a while)..."
+  info "Using $_nproc parallel jobs."
+  run_cmd "make crossgcc-i386 CPUS=$_nproc" || return 1
+  success "Cross-compiler ready."
+
+  # Build coreboot
+  echo ""
+  info "Building coreboot..."
+  run_cmd "make -j$_nproc" || return 1
+
+  if [ ! -f "$COREBOOT_DIR/build/coreboot.rom" ]; then
+    error "coreboot.rom not found after build."
+    return 1
+  fi
+
+  _size=$(wc -c < "$COREBOOT_DIR/build/coreboot.rom")
+  success "Build complete: $COREBOOT_DIR/build/coreboot.rom ($_size bytes)"
+}

coreboot-t440p/steps/build_cbfstool.sh

@@ -0,0 +1,17 @@
+#!/bin/sh
+# Step: Build cbfstool
+
+step_build_cbfstool() {
+  section "Build cbfstool"
+
+  info "Building cbfstool (Coreboot Filesystem tool)..."
+  cd "$COREBOOT_DIR" || return 1
+  run_cmd "make -C util/cbfstool" || return 1
+
+  if [ ! -f "$COREBOOT_DIR/util/cbfstool/cbfstool" ]; then
+    error "cbfstool binary not found after build."
+    return 1
+  fi
+
+  success "cbfstool built."
+}

coreboot-t440p/steps/build_ifdtool.sh

@@ -0,0 +1,60 @@
+#!/bin/sh
+# Step: Build ifdtool and extract firmware blobs
+
+step_build_ifdtool() {
+  section "Build ifdtool & Extract Firmware Blobs"
+
+  # Build ifdtool
+  info "Building ifdtool (Intel Firmware Descriptor tool)..."
+  cd "$COREBOOT_DIR/util/ifdtool" || return 1
+  run_cmd "make" || return 1
+
+  if [ ! -f "$COREBOOT_DIR/util/ifdtool/ifdtool" ]; then
+    error "ifdtool binary not found after build."
+    return 1
+  fi
+  success "ifdtool built."
+
+  # Extract firmware blobs from the original ROM
+  echo ""
+  info "Extracting firmware blobs from original BIOS..."
+
+  if [ ! -f "$ORIGINAL_ROM" ]; then
+    error "Original ROM not found: $ORIGINAL_ROM"
+    error "Complete the BIOS extraction steps first."
+    return 1
+  fi
+
+  run_cmd "./ifdtool -x $ORIGINAL_ROM" || return 1
+
+  # Move blobs to working directory
+  if [ -f "flashregion_0_flashdescriptor.bin" ]; then
+    mv flashregion_0_flashdescriptor.bin "$BLOB_IFD"
+    success "Extracted: ifd.bin (flash descriptor)"
+  else
+    error "Flash descriptor not found in extraction output."
+    return 1
+  fi
+
+  if [ -f "flashregion_2_intel_me.bin" ]; then
+    mv flashregion_2_intel_me.bin "$BLOB_ME"
+    success "Extracted: me.bin (Intel ME firmware)"
+  else
+    error "Intel ME firmware not found in extraction output."
+    return 1
+  fi
+
+  if [ -f "flashregion_3_gbe.bin" ]; then
+    mv flashregion_3_gbe.bin "$BLOB_GBE"
+    success "Extracted: gbe.bin (Gigabit Ethernet config)"
+  else
+    error "GbE config not found in extraction output."
+    return 1
+  fi
+
+  # Clean up any other extraction artifacts
+  rm -f flashregion_*.bin
+
+  echo ""
+  success "All firmware blobs extracted to $WORK_DIR"
+}

coreboot-t440p/steps/build_peppy.sh

@@ -0,0 +1,42 @@
+#!/bin/sh
+# Step: Download peppy ChromeOS image and extract mrc.bin
+
+step_build_peppy() {
+  section "Obtain mrc.bin"
+
+  info "mrc.bin is a memory reference code blob needed for Haswell platforms."
+  info "It will be extracted from a ChromeOS peppy firmware image."
+  echo ""
+
+  cd "$COREBOOT_DIR/util/chromeos" || return 1
+
+  # Download peppy firmware
+  info "Downloading peppy ChromeOS firmware image (this may take a while)..."
+  run_cmd "./crosfirmware.sh peppy" || return 1
+
+  # Find the downloaded image
+  _peppy_image=$(ls coreboot-*.bin 2>/dev/null | head -1)
+  if [ -z "$_peppy_image" ]; then
+    error "Peppy firmware image not found after download."
+    return 1
+  fi
+  info "Downloaded: $_peppy_image"
+
+  # Extract mrc.bin using cbfstool
+  info "Extracting mrc.bin..."
+  run_cmd "../cbfstool/cbfstool $_peppy_image extract -f mrc.bin -n mrc.bin -r RO_SECTION" || return 1
+
+  if [ ! -f "mrc.bin" ]; then
+    error "mrc.bin not found after extraction."
+    return 1
+  fi
+
+  mv mrc.bin "$BLOB_MRC"
+  success "mrc.bin extracted to $BLOB_MRC"
+
+  # Clean up the large peppy image
+  if prompt_yes_default "Remove peppy firmware image to save space?"; then
+    rm -f coreboot-*.bin
+    info "Cleaned up peppy firmware image."
+  fi
+}

coreboot-t440p/steps/clone_coreboot.sh

@@ -0,0 +1,42 @@
+#!/bin/sh
+# Step: Clone and prepare the coreboot repository
+
+step_clone_coreboot() {
+  section "Clone Coreboot Repository"
+
+  if [ -d "$COREBOOT_DIR" ]; then
+    warn "Coreboot directory already exists: $COREBOOT_DIR"
+    if prompt_yes_no "Remove and re-clone?"; then
+      rm -rf "$COREBOOT_DIR"
+    else
+      info "Using existing coreboot directory."
+      cd "$COREBOOT_DIR" || return 1
+
+      _current=$(git rev-parse HEAD 2>/dev/null)
+      if [ "$_current" = "$COREBOOT_COMMIT" ]; then
+        success "Already on correct commit."
+        return 0
+      else
+        warn "Current commit ($_current) differs from expected ($COREBOOT_COMMIT)."
+        if prompt_yes_no "Checkout the correct commit?"; then
+          run_cmd "git checkout $COREBOOT_COMMIT" || return 1
+          run_cmd "git submodule update --init --checkout" || return 1
+        fi
+        return 0
+      fi
+    fi
+  fi
+
+  info "Cloning coreboot (this may take a while)..."
+  run_cmd "git clone https://review.coreboot.org/coreboot $COREBOOT_DIR" || return 1
+
+  cd "$COREBOOT_DIR" || return 1
+
+  info "Checking out commit: $COREBOOT_COMMIT"
+  run_cmd "git checkout $COREBOOT_COMMIT" || return 1
+
+  info "Initializing submodules..."
+  run_cmd "git submodule update --init --checkout" || return 1
+
+  success "Coreboot repository ready."
+}

coreboot-t440p/steps/combine_bios.sh

@@ -0,0 +1,27 @@
+#!/bin/sh
+# Step: Combine BIOS chip images into a single ROM
+
+step_combine_bios() {
+  section "Combine BIOS Images"
+
+  cd "$WORK_DIR" || return 1
+
+  info "Combining 8MB (bottom) + 4MB (top) into a single 12MB ROM..."
+  run_cmd "cat 8mb_backup1.bin 4mb_backup1.bin > t440p-original.rom" || return 1
+
+  _size=$(wc -c < t440p-original.rom)
+  info "Combined ROM size: $_size bytes"
+
+  if [ "$_size" -eq "$SIZE_12MB" ]; then
+    success "ROM size correct (12MB)."
+  else
+    warn "ROM size is not 12MB ($_size bytes). This may indicate an issue."
+    if ! prompt_yes_no "Continue anyway?"; then
+      return 1
+    fi
+  fi
+
+  success "Original BIOS saved: $WORK_DIR/t440p-original.rom"
+  echo ""
+  warn "Keep this file safe! You will need it if you ever want to revert."
+}

coreboot-t440p/steps/configure.sh

@@ -0,0 +1,151 @@
+#!/bin/sh
+# Step: Configure coreboot
+
+step_configure() {
+  section "Configure Coreboot"
+
+  cd "$COREBOOT_DIR" || return 1
+
+  # Verify all blobs are present
+  info "Checking for required firmware blobs..."
+  _missing=0
+  for _blob in "$BLOB_IFD" "$BLOB_ME" "$BLOB_GBE" "$BLOB_MRC"; do
+    if [ -f "$_blob" ]; then
+      success "Found: $_blob"
+    else
+      error "Missing: $_blob"
+      _missing=1
+    fi
+  done
+
+  if [ "$_missing" -eq 1 ]; then
+    error "Some blobs are missing. Complete the previous steps first."
+    return 1
+  fi
+
+  echo ""
+  info "Choose a payload for your coreboot build:"
+  echo ""
+  echo "  1) GRUB2     - Direct Linux boot, includes memtest/nvramcui/coreinfo"
+  echo "  2) SeaBIOS   - Traditional BIOS, best compatibility (Windows/BSD)"
+  echo "  3) edk2      - UEFI firmware, modern boot interface"
+  echo "  4) Custom    - Open the full configuration menu"
+  echo ""
+
+  _payload=""
+  while [ -z "$_payload" ]; do
+    printf "${CYAN}Choice [1-4]:${NC} "
+    read -r _choice
+    case "$_choice" in
+      1) _payload="grub2" ;;
+      2) _payload="seabios" ;;
+      3) _payload="edk2" ;;
+      4) _payload="custom" ;;
+      *) echo "Please enter 1-4." ;;
+    esac
+  done
+
+  _has_dgpu="n"
+  if [ "$_payload" != "custom" ]; then
+    echo ""
+    if prompt_yes_no "Does your T440p have the GT730M dGPU?"; then
+      _has_dgpu="y"
+    fi
+  fi
+
+  if [ "$_payload" = "custom" ]; then
+    info "Opening full coreboot configuration..."
+    info "Key settings to configure:"
+    echo "  - Mainboard vendor: Lenovo"
+    echo "  - Mainboard model: ThinkPad T440p / W541"
+    echo "  - Set blob paths under Chipset:"
+    echo "    IFD: $BLOB_IFD"
+    echo "    ME:  $BLOB_ME"
+    echo "    GbE: $BLOB_GBE"
+    echo "    MRC: $BLOB_MRC"
+    echo ""
+    prompt_continue
+    make nconfig
+    return $?
+  fi
+
+  # Generate seed .config
+  info "Generating configuration for: $_payload"
+
+  cat > .config << COREBOOT_CONFIG
+# Mainboard
+CONFIG_VENDOR_LENOVO=y
+CONFIG_BOARD_LENOVO_HASWELL=y
+
+# Firmware blobs
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_IFD_BIN_PATH="$BLOB_IFD"
+CONFIG_HAVE_ME_BIN=y
+CONFIG_ME_BIN_PATH="$BLOB_ME"
+CONFIG_HAVE_GBE_BIN=y
+CONFIG_GBE_BIN_PATH="$BLOB_GBE"
+CONFIG_HAVE_MRC=y
+CONFIG_MRC_FILE="$BLOB_MRC"
+COREBOOT_CONFIG
+
+  # Payload-specific options
+  case "$_payload" in
+    grub2)
+      cat >> .config << 'GRUB_CONFIG'
+
+# Payload
+CONFIG_PAYLOAD_GRUB2=y
+CONFIG_GRUB2_INCLUDE_RUNTIME_CONFIG_FILE=y
+
+# Secondary payloads
+CONFIG_PAYLOAD_FILE_IS_GRUB2=y
+CONFIG_MEMTEST_SECONDARY_PAYLOAD=y
+CONFIG_NVRAMCUI_SECONDARY_PAYLOAD=y
+CONFIG_COREINFO_SECONDARY_PAYLOAD=y
+GRUB_CONFIG
+      ;;
+    seabios)
+      cat >> .config << 'SEABIOS_CONFIG'
+
+# Payload
+CONFIG_PAYLOAD_SEABIOS=y
+CONFIG_SEABIOS_STABLE=y
+SEABIOS_CONFIG
+      ;;
+    edk2)
+      cat >> .config << 'EDK2_CONFIG'
+
+# Payload
+CONFIG_PAYLOAD_EDK2=y
+EDK2_CONFIG
+      ;;
+  esac
+
+  # dGPU option ROM
+  if [ "$_has_dgpu" = "y" ]; then
+    cat >> .config << 'DGPU_CONFIG'
+
+# dGPU (GT730M) VGA option ROM
+CONFIG_VGA_BIOS=y
+CONFIG_VGA_BIOS_DGPU=y
+DGPU_CONFIG
+    info "dGPU option ROM support enabled."
+  fi
+
+  # Fill in remaining defaults
+  info "Resolving full configuration with defaults..."
+  run_cmd "make olddefconfig" || {
+    warn "olddefconfig failed. Opening full configuration menu instead."
+    make nconfig
+    return $?
+  }
+
+  success "Configuration generated for: $_payload"
+
+  echo ""
+  if prompt_yes_no "Open the configuration menu to review/customize?"; then
+    make nconfig
+  fi
+
+  return 0
+}

coreboot-t440p/steps/extract_bios.sh

@@ -0,0 +1,41 @@
+#!/bin/sh
+# Step: Extract original BIOS from both EEPROM chips
+
+step_extract_bios() {
+  section "Extract Original BIOS"
+
+  info "The T440p has two EEPROM chips that need to be read:"
+  echo "  - 4MB (top) chip"
+  echo "  - 8MB (bottom) chip"
+  echo ""
+  info "Each chip will be read twice to verify data integrity."
+  warn "Make sure the programmer is attached to the correct chip!"
+
+  cd "$WORK_DIR" || return 1
+
+  # --- 4MB chip ---
+  echo ""
+  info "Attach the programmer to the 4MB (top) chip."
+  prompt_continue
+
+  info "Reading 4MB chip (read 1 of 2)..."
+  run_cmd "sudo flashrom --programmer ch341a_spi -r 4mb_backup1.bin" || return 1
+
+  info "Reading 4MB chip (read 2 of 2)..."
+  run_cmd "sudo flashrom --programmer ch341a_spi -r 4mb_backup2.bin" || return 1
+
+  success "4MB chip reads complete."
+
+  # --- 8MB chip ---
+  echo ""
+  info "Now attach the programmer to the 8MB (bottom) chip."
+  prompt_continue
+
+  info "Reading 8MB chip (read 1 of 2)..."
+  run_cmd "sudo flashrom --programmer ch341a_spi -r 8mb_backup1.bin" || return 1
+
+  info "Reading 8MB chip (read 2 of 2)..."
+  run_cmd "sudo flashrom --programmer ch341a_spi -r 8mb_backup2.bin" || return 1
+
+  success "8MB chip reads complete."
+}

coreboot-t440p/steps/flash_bios.sh

@@ -0,0 +1,58 @@
+#!/bin/sh
+# Step: Flash coreboot to the T440p
+
+step_flash_bios() {
+  section "Flash Coreboot"
+
+  cd "$COREBOOT_DIR/build" || return 1
+
+  if [ ! -f "coreboot.rom" ]; then
+    error "coreboot.rom not found. Run the build step first."
+    return 1
+  fi
+
+  # Split the ROM
+  info "Splitting ROM for 8MB (bottom) and 4MB (top) chips..."
+  run_cmd "dd if=coreboot.rom of=bottom.rom bs=1M count=8" || return 1
+  run_cmd "dd if=coreboot.rom of=top.rom bs=1M skip=8" || return 1
+
+  _bottom_size=$(wc -c < bottom.rom)
+  _top_size=$(wc -c < top.rom)
+  info "bottom.rom: $_bottom_size bytes"
+  info "top.rom: $_top_size bytes"
+
+  echo ""
+  warn "You are about to flash coreboot onto your T440p."
+  warn "Make sure your laptop is powered off and the battery is removed."
+  warn "DO NOT interrupt the flashing process!"
+  echo ""
+
+  if ! prompt_yes_no "Ready to flash?"; then
+    info "Flash cancelled."
+    return 0
+  fi
+
+  # Flash 4MB (top) chip
+  echo ""
+  info "Attach the programmer to the 4MB (top) chip."
+  prompt_continue
+
+  info "Flashing 4MB chip..."
+  run_cmd "sudo flashrom --programmer ch341a_spi -w top.rom" || return 1
+  success "4MB chip flashed."
+
+  # Flash 8MB (bottom) chip
+  echo ""
+  info "Now attach the programmer to the 8MB (bottom) chip."
+  prompt_continue
+
+  info "Flashing 8MB chip..."
+  run_cmd "sudo flashrom --programmer ch341a_spi -w bottom.rom" || return 1
+  success "8MB chip flashed."
+
+  echo ""
+  success "Coreboot has been flashed successfully!"
+  echo ""
+  info "Reassemble your laptop and power it on."
+  info "If everything went well, you should see coreboot boot!"
+}

coreboot-t440p/steps/revert_bios.sh

@@ -0,0 +1,85 @@
+#!/bin/sh
+# Step: Revert to original BIOS
+
+step_revert_bios() {
+  section "Revert to Original BIOS"
+
+  if [ ! -f "$ORIGINAL_ROM" ]; then
+    error "Original ROM not found: $ORIGINAL_ROM"
+    error "Cannot revert without the original backup."
+    return 1
+  fi
+
+  echo "  How would you like to revert?"
+  echo ""
+  echo "  1) Can't boot  - Use external CH341A programmer"
+  echo "  2) Can boot     - Flash internally (requires iomem=relaxed)"
+  echo "  3) Cancel"
+  echo ""
+
+  printf "${CYAN}Choice [1-3]:${NC} "
+  read -r _choice
+
+  case "$_choice" in
+    1) _revert_external ;;
+    2) _revert_internal ;;
+    *) info "Revert cancelled."; return 0 ;;
+  esac
+}
+
+_revert_external() {
+  info "Reverting via external programmer..."
+  echo ""
+
+  cd "$WORK_DIR" || return 1
+
+  # Split original ROM for both chips
+  info "Splitting original ROM..."
+  run_cmd "dd if=t440p-original.rom of=bottom.rom bs=1M count=8" || return 1
+  run_cmd "dd if=t440p-original.rom of=top.rom bs=1M skip=8" || return 1
+
+  # Flash 4MB (top) chip
+  info "Attach the programmer to the 4MB (top) chip."
+  prompt_continue
+
+  info "Flashing original 4MB chip..."
+  run_cmd "sudo flashrom --programmer ch341a_spi -w top.rom" || return 1
+  success "4MB chip restored."
+
+  # Flash 8MB (bottom) chip
+  echo ""
+  info "Now attach the programmer to the 8MB (bottom) chip."
+  prompt_continue
+
+  info "Flashing original 8MB chip..."
+  run_cmd "sudo flashrom --programmer ch341a_spi -w bottom.rom" || return 1
+  success "8MB chip restored."
+
+  echo ""
+  success "Original BIOS restored! Reassemble and power on."
+}
+
+_revert_internal() {
+  info "Reverting via internal flash..."
+  echo ""
+
+  warn "This requires the kernel parameter iomem=relaxed."
+  echo ""
+
+  if prompt_yes_default "Set iomem=relaxed in GRUB and reboot first?"; then
+    info "Adding iomem=relaxed to GRUB config..."
+    run_cmd "sudo sed -i '/GRUB_CMDLINE_LINUX_DEFAULT/ s/\"/ iomem=relaxed\"/2' /etc/default/grub" || return 1
+    run_cmd "sudo grub-mkconfig -o /boot/grub/grub.cfg" || return 1
+    echo ""
+    warn "You must reboot now for iomem=relaxed to take effect."
+    info "After rebooting, run this script again and choose the internal revert option."
+    return 0
+  fi
+
+  info "Flashing original BIOS internally..."
+  run_cmd "sudo flashrom -p internal:laptop=force_I_want_a_brick -w $ORIGINAL_ROM" || return 1
+
+  success "Original BIOS restored! Reboot to apply."
+  echo ""
+  warn "Remember to remove iomem=relaxed from your GRUB config after reverting."
+}

coreboot-t440p/steps/update_bios.sh

@@ -0,0 +1,25 @@
+#!/bin/sh
+# Step: Update coreboot internally (when already running coreboot)
+
+step_update_bios() {
+  section "Update Coreboot (Internal Flash)"
+
+  info "This updates your coreboot installation without an external programmer."
+  info "Only use this if your T440p is already running coreboot."
+  echo ""
+
+  if [ ! -f "$COREBOOT_DIR/build/coreboot.rom" ]; then
+    error "coreboot.rom not found. Build coreboot first."
+    return 1
+  fi
+
+  warn "This will overwrite your current BIOS using internal flashing."
+  if ! prompt_yes_no "Continue?"; then
+    return 0
+  fi
+
+  info "Flashing coreboot internally..."
+  run_cmd "sudo flashrom -p internal:laptop=force_I_want_a_brick -w $COREBOOT_DIR/build/coreboot.rom" || return 1
+
+  success "Coreboot updated! Reboot to apply."
+}